Research data from Liu Weichen's team.

Appointment: Nanyang Assistant Professor

Research topics:
• Embedded and Real-Time Systems
• Many-Core Systems
• Electronic/Photonic Network-on-Chip
• Machine Learning Acceleration
• Computer Architecture

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1 to 10 of 15 Results
Related Data for: Timinganomaly free dynamic scheduling of conditional DAG tasks on multi-core systems
Dec 5, 2023 - Li Shiqing
Li, Shiqing; Chen, Peng; Liu, Weichen; Jiang, Xu; He, Qingqiang; Guan, Nan, 2023, "Related Data for: Timinganomaly free dynamic scheduling of conditional DAG tasks on multi-core systems", https://doi.org/10.21979/N9/F5KN5M, DR-NTU (Data), V1
The related data for Timinganomaly free dynamic scheduling of conditional DAG tasks on multi-core systems
Related Data for: MindReading: An Ultra-Low-Power Photonic Accelerator for EEG-based Human Intention Recognition
Dec 5, 2023 - Li Shiqing
Li, Shiqing; Lou, Qian; Liu, Wenyang; Liu, Weichen; Guo, Feng; Jiang, Lei, 2023, "Related Data for: MindReading: An Ultra-Low-Power Photonic Accelerator for EEG-based Human Intention Recognition", https://doi.org/10.21979/N9/GGBPTG, DR-NTU (Data), V1
The related data for MindReading: An Ultra-Low-Power Photonic Accelerator for EEG-based Human Intention Recognition
Related data for: Thermal-aware task mapping on dynamically reconfigurable networkon- chip based multiprocessor system-on-chip
Dec 5, 2023 - Li Shiqing
Li, Shiqing; Liu, Weichen; Yang, Lei; Jiang, Weiwen; Feng, Liang; Guan, Nan; Zhang, Wei; Dutt, Nikil, 2023, "Related data for: Thermal-aware task mapping on dynamically reconfigurable networkon- chip based multiprocessor system-on-chip", https://doi.org/10.21979/N9/NOZOQ9, DR-NTU (Data), V1
The related code for "Thermal-aware task mapping on dynamically reconfigurable network on-chip based multiprocessor system-on-chip"
Related Data for: Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression
Sep 20, 2023 - Li Shiqing
Li, Shiqing; Liu, Di; Liu, Weichen, 2023, "Related Data for: Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression", https://doi.org/10.21979/N9/EXZ0Y3, DR-NTU (Data), V1
The code for the paper: Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression
Replication Data for: Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient In-Memory Acceleration
Mar 30, 2023 - Huai Shuo
Huai, Shuo; Liu, Weichen, 2023, "Replication Data for: Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient In-Memory Acceleration", https://doi.org/10.21979/N9/OVGZZ1, DR-NTU (Data), V1
Codes for "Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient In-Memory Acceleration"
Replication Data for: iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations
Replication Data for: iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations
May 12, 2022 - Zhu Shien
Zhu, Shien; Li, Shiqing; Liu, Weichen, 2022, "Replication Data for: iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations", https://doi.org/10.21979/N9/JNFW9P, DR-NTU (Data), V2, UNF:6:L3+xW/BxBE6fYNWBm4ta6Q== [fileUNF]
The simulation code, experiment results, and graphs used in the GLSVLSI 2022 paper: iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations
Replication Data for: TAB: Unified and Optimized Ternary, Binary and Mixed-Precision Neural Network Inference on the Edge
May 10, 2022 - Zhu Shien
Zhu, Shien; Duong, H. K. Luan; Liu, Weichen, 2022, "Replication Data for: TAB: Unified and Optimized Ternary, Binary and Mixed-Precision Neural Network Inference on the Edge", https://doi.org/10.21979/N9/RZ75BY, DR-NTU (Data), V1, UNF:6:Md7is6scgmHZ4O3PtUuAOg== [fileUNF]
The TAB experiment code running on ARM CPU, x86 CPU, and Nvidia GPU.
ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission
Mar 7, 2022 - Chen Hui
Chen, Hui, 2022, "ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission", https://doi.org/10.21979/N9/18DIB5, DR-NTU (Data), V1
This dataverse contains the codes for TCAD-21: "ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission"
Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs
Mar 7, 2022 - Chen Hui
Chen, Hui, 2022, "Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs", https://doi.org/10.21979/N9/8NHU9V, DR-NTU (Data), V1
This dataverse contains the codes for GLSVLSI-21: "Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs"
MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems
Mar 7, 2022 - Chen Hui
Chen, Hui, 2022, "MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems", https://doi.org/10.21979/N9/TGQNYS, DR-NTU (Data), V1
This dataverse contains the codes for TECS-21: "MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems"
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