<?xml version='1.0' encoding='UTF-8'?><codeBook xmlns="ddi:codebook:2_5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="ddi:codebook:2_5 https://ddialliance.org/Specification/DDI-Codebook/2.5/XMLSchema/codebook.xsd" version="2.5"><docDscr><citation><titlStmt><titl>Related data for: Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches</titl><IDNo agency="DOI">doi:10.21979/N9/OA7NLF</IDNo></titlStmt><distStmt><distrbtr source="archive">DR-NTU (Data)</distrbtr><distDate>2023-06-14</distDate></distStmt><verStmt source="archive"><version date="2023-06-14" type="RELEASED">1</version></verStmt><biblCit>Li, Shiqing; Liu, Weichen, 2023, "Related data for: Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches", https://doi.org/10.21979/N9/OA7NLF, DR-NTU (Data), V1</biblCit></citation></docDscr><stdyDscr><citation><titlStmt><titl>Related data for: Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches</titl><IDNo agency="DOI">doi:10.21979/N9/OA7NLF</IDNo></titlStmt><rspStmt><AuthEnty affiliation="Nanyang Technological University">Li, Shiqing</AuthEnty><AuthEnty affiliation="Nanyang Technological University">Liu, Weichen</AuthEnty></rspStmt><prodStmt><software version="2022.1">Xilinx Vitis</software><grantNo agency="Nanyang Technological University">NAP M4082282</grantNo><grantNo agency="Ministry of Education (MOE)">Academic Research Fund Tier 2 MOE2019-T2-1-071</grantNo></prodStmt><distStmt><distrbtr source="archive">DR-NTU (Data)</distrbtr><contact affiliation="Nanyang Technological University">Li, Shiqing</contact><depositr>Li, Shiqing</depositr><depDate>2023-06-14</depDate></distStmt><holdings URI="https://doi.org/10.21979/N9/OA7NLF"/></citation><stdyInfo><subject><keyword xml:lang="en">Computer and Information Science</keyword><keyword>Computer and Information Science</keyword><keyword>SpMM on embedded FPGAs</keyword></subject><abstract>The code for our DATE work entitled "Accelerating Gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches".</abstract><sumDscr><dataKind>Program source code</dataKind></sumDscr></stdyInfo><method><dataColl><sources/></dataColl><anlyInfo/></method><dataAccs><setAvail/><useStmt/></dataAccs><othrStdyMat><relStdy>&lt;a href="https://github.com/lsq314/SpMM_DATE"> 
https://github.com/lsq314/SpMM_DATE&lt;/a></relStdy><relPubl><citation><titlStmt><IDNo agency="handle">10356/167477</IDNo></titlStmt><biblCit>Li, S. &amp; Liu, W. (2023). Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches. 2023 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE).</biblCit></citation><ExtLink URI="https://hdl.handle.net/10356/167477"/></relPubl><relPubl><citation><titlStmt><IDNo agency="doi">10.23919/DATE56975.2023.10136958</IDNo></titlStmt><biblCit>Li, S., &amp; Liu, W. (2023, April). Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches. In 2023 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE) (pp. 1-6). IEEE.</biblCit></citation><ExtLink URI="https://ieeexplore.ieee.org/document/10136958"/></relPubl></othrStdyMat></stdyDscr></codeBook>